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» Verification and Optimization of a PLC Control Schedule
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SPIN
2000
Springer
13 years 9 months ago
Verification and Optimization of a PLC Control Schedule
Abstract. We report on the use of model checking techniques for both the verification of a process control program and the derivation of optimal control schedules. Most of this wor...
Ed Brinksma, Angelika Mader
GLVLSI
2007
IEEE
151views VLSI» more  GLVLSI 2007»
13 years 9 months ago
Hand-in-hand verification of high-level synthesis
This paper describes a formal verification methodology of highnthesis (HLS) process. The abstraction level of the input to HLS is so high compared to that of the output that the v...
Chandan Karfa, Dipankar Sarkar, Chittaranjan A. Ma...
FSEN
2009
Springer
13 years 9 months ago
Verification, Performance Analysis and Controller Synthesis for Real-Time Systems
This note aims at providing a concise and precise Travellers Guide, Phrase Book or Reference Manual to the timed automata modeling formalism introduced by Alur and Dill [7, 8]. The...
Uli Fahrenberg, Kim G. Larsen, Claus R. Thrane
RTS
2006
132views more  RTS 2006»
13 years 5 months ago
A framework for modular analysis and exploration of heterogeneous embedded systems
Abstract The increasing complexity of heterogeneous systems-on-chip, SoC, and distributed embedded systems makes system optimization and exploration a challenging task. Ideally, a ...
Arne Hamann, Marek Jersak, Kai Richter, Rolf Ernst
VLSID
2006
IEEE
192views VLSI» more  VLSID 2006»
13 years 11 months ago
Beyond RTL: Advanced Digital System Design
This tutorial focuses on advanced techniques to cope with the complexity of designing modern digital chips which are complete systems often containing multiple processors, complex...
Shiv Tasker, Rishiyur S. Nikhil