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IEICET
2006
114views more  IEICET 2006»
13 years 5 months ago
Synchronization Verification in System-Level Design with ILP Solvers
Concurrency is one of the most important issues in system-level design. Interleaving among parallel processes can cause an extremely large number of different behaviors, making de...
Thanyapat Sakunkonchak, Satoshi Komatsu, Masahiro ...
FORMATS
2007
Springer
13 years 9 months ago
Partial Order Reduction for Verification of Real-Time Components
Abstract. We describe a partial order reduction technique for a realtime component model. Components are described as timed automata with data ports, which can be composed in stati...
John Håkansson, Paul Pettersson
FORMATS
2004
Springer
13 years 10 months ago
Bounded Model Checking for Region Automata
For successful software verification, model checkers must be capable of handling a large number of program variables. Traditional, BDD-based model checking is deficient in this reg...
Fang Yu, Bow-Yaw Wang, Yao-Wen Huang
IFM
2009
Springer
155views Formal Methods» more  IFM 2009»
13 years 2 months ago
Application of Graph Transformation in Verification of Dynamic Systems
Abstract. A communication system evolves dynamically with the addition and deletion of services. In our previous work [12], a graph transformation system (GTS) was used to model th...
Zarrin Langari, Richard J. Trefler
TCAD
2008
90views more  TCAD 2008»
13 years 5 months ago
Application and Verification of Local Nonsemantic-Preserving Transformations in System Design
Due to the increasing abstraction gap between the initial system model and a final implementation, the verification of the respective models against each other is a formidable task...
Tarvo Raudvere, Ingo Sander, Axel Jantsch