169 search results - page 4 / 34 » Verification of Dynamically Reconfigurable Logic |
JUCS
2007
13 years 5 months ago
2007
: This article presents an architecture that encrypts data with the AES algorithm. This architecture can be implemented on the Xilinx Virtex II FPGA family, by applying pipelining ...
DATE
1999
IEEE
13 years 10 months ago
1999
IEEE
Dynamically reconfigurable embedded systems offer potential for higher performance as well as adaptability to changing system requirements at low cost. Such systems employ run-tim...
IPPS
2005
IEEE
13 years 11 months ago
2005
IEEE
Data flow and FSMs are used intensively to specify real-time systems in the field of mechatronics. Their implementation in FPGAs is discussed against the background of dynamic rec...
DAC
2005
ACM
14 years 7 months ago
2005
ACM
Many reconfigurable architectures offer partial dynamic configurability, but current system-level tools cannot guarantee feasible implementations when exploiting this feature. We ...
FPL
2000
Springer
13 years 9 months ago
2000
Springer
abstract the dynamic nature of a computation to embedded data memory (which is accessible on-chip). The dynamic nature of a computation corresponds to the dynamic features of its i...