Sciweavers

2 search results - page 1 / 1
» Verification of Pipelined Microprocessors by Correspondence ...
Sort
View
ACSD
1998
IEEE
90views Hardware» more  ACSD 1998»
13 years 9 months ago
Verification of Pipelined Microprocessors by Correspondence Checking in Symbolic Ternary Simulation
This paper makes the idea of memory shadowing [5] applicable to symbolic ternary simulation. Memory shadowing, an extension of Burch and Dill's pipeline verification method [...
Miroslav N. Velev, Randal E. Bryant
DAC
1994
ACM
13 years 9 months ago
Automatic Verification of Pipelined Microprocessors
Abstract - We address the problem of automatically verifying large digital designs at the logic level, against high-level specifications. In this paper, we present a methodology wh...
Vishal Bhagwati, Srinivas Devadas