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ICCAD
2008
IEEE
127views Hardware» more  ICCAD 2008»
14 years 1 months ago
Verification of arithmetic datapaths using polynomial function models and congruence solving
Abstract— This paper addresses the problem of solving finite word-length (bit-vector) arithmetic with applications to equivalence verification of arithmetic datapaths. Arithmet...
Neal Tew, Priyank Kalla, Namrata Shekhar, Sivaram ...
DATE
2006
IEEE
104views Hardware» more  DATE 2006»
13 years 11 months ago
Equivalence verification of arithmetic datapaths with multiple word-length operands
Abstract: This paper addresses the problem of equivalence verification of RTL descriptions that implement arithmetic computations (add, mult, shift) over bitvectors that have di...
Namrata Shekhar, Priyank Kalla, Florian Enescu
ICCAD
2010
IEEE
140views Hardware» more  ICCAD 2010»
13 years 2 months ago
Polynomial datapath optimization using constraint solving and formal modelling
For a variety of signal processing applications polynomials are implemented in circuits. Recent work on polynomial datapath optimization achieved significant reductions of hardware...
Finn Haedicke, Bijan Alizadeh, Görschwin Fey,...
ITC
2003
IEEE
222views Hardware» more  ITC 2003»
13 years 10 months ago
Race: A Word-Level ATPG-Based Constraints Solver System For Smart Random Simulation
Functional verification of complex designs largely relies on the use of simulation in conjunction high-level verification languages (HVL) and test-bench automation (TBA) tools. In...
Mahesh A. Iyer
IFIP
2001
Springer
13 years 9 months ago
Functional Test Generation using Constraint Logic Programming
— Semi-formal verification based on symbolic simulation offers a good compromise between formal model checking and numerical simulation. The generation of functional test vector...
Zhihong Zeng, Maciej J. Ciesielski, Bruno Rouzeyre