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» Verifying a Simple Pipelined Microprocessor Using Maude
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WADT
2001
Springer
13 years 9 months ago
Verifying a Simple Pipelined Microprocessor Using Maude
Abstract. We consider the verification of a simple pipelined microprocessor in Maude, by implementing an equational theoretical model of systems. Maude is an equationally-based la...
Neal A. Harman
DAC
1994
ACM
13 years 9 months ago
Automatic Verification of Pipelined Microprocessors
Abstract - We address the problem of automatically verifying large digital designs at the logic level, against high-level specifications. In this paper, we present a methodology wh...
Vishal Bhagwati, Srinivas Devadas
VLSID
2007
IEEE
97views VLSI» more  VLSID 2007»
14 years 5 months ago
Efficient Microprocessor Verification using Antecedent Conditioned Slicing
We present a technique for automatic verification of pipelined microprocessors using model checking. Antecedent conditioned slicing is an efficient abstraction technique for hardw...
Shobha Vasudevan, Vinod Viswanath, Jacob A. Abraha...
POPL
2010
ACM
14 years 2 months ago
A simple, verified validator for software pipelining
Software pipelining is a loop optimization that overlaps the execution of several iterations of a loop to expose more instruction-level parallelism. It can result in first-class p...
Jean-Baptiste Tristan, Xavier Leroy
IEEEPACT
2007
IEEE
13 years 11 months ago
Verification-Aware Microprocessor Design
The process of verifying a new microprocessor is a major problem for the computer industry. Currently, architects design processors to be fast, power-efficient, and reliable. Howe...
Anita Lungu, Daniel J. Sorin