Sciweavers

29 search results - page 2 / 6
» WAVSTAN: waveform based variational static timing analysis
Sort
View
DATE
2003
IEEE
90views Hardware» more  DATE 2003»
13 years 10 months ago
Transistor-Level Static Timing Analysis by Piecewise Quadratic Waveform Matching
While fast timing analysis methods, such as asymptotic waveform evaluation (AWE), have been well established for linear circuits, the timing analysis for non-linear circuits, whic...
Zhong Wang, Jianwen Zhu
ISQED
2007
IEEE
151views Hardware» more  ISQED 2007»
13 years 11 months ago
Gate Level Statistical Simulation Based on Parameterized Models for Process and Signal Variations
We propose gate level statistical simulation to bridge the gap between the most accurate Monte Carlo SPICE simulation and the most efficient circuit level statistical static timi...
Bao Liu
ICCAD
1996
IEEE
151views Hardware» more  ICCAD 1996»
13 years 8 months ago
Expected current distributions for CMOS circuits
The analysis of CMOS VLSI circuit switching current has become an increasingly important and difficult task from both a VLSI design and simulation software perspective. This paper...
Dennis J. Ciplickas, Ronald A. Rohrer
ASPDAC
2008
ACM
104views Hardware» more  ASPDAC 2008»
13 years 6 months ago
Pessimism reduction in coupling-aware static timing analysis using timing and logic filtering
With continued scaling of technology into nanometer regimes, the impact of coupling induced delay variations is significant. While several coupling-aware static timers have been pr...
Debasish Das, Kip Killpack, Chandramouli V. Kashya...
ICCAD
2006
IEEE
147views Hardware» more  ICCAD 2006»
14 years 1 months ago
Analysis and modeling of CD variation for statistical static timing
Statistical static timing analysis (SSTA) has become a key method for analyzing the effect of process variation in aggressively scaled CMOS technologies. Much research has focused...
Brian Cline, Kaviraj Chopra, David Blaauw, Yu Cao