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ASPLOS
2010
ACM
14 years 19 days ago
MacroSS: macro-SIMDization of streaming applications
SIMD (Single Instruction, Multiple Data) engines are an essential part of the processors in various computing markets, from servers to the embedded domain. Although SIMD-enabled a...
Amir Hormati, Yoonseo Choi, Mark Woh, Manjunath Ku...
VLDB
2007
ACM
145views Database» more  VLDB 2007»
14 years 6 months ago
Executing Stream Joins on the Cell Processor
Low-latency and high-throughput processing are key requirements of data stream management systems (DSMSs). Hence, multi-core processors that provide high aggregate processing capa...
Bugra Gedik, Philip S. Yu, Rajesh Bordawekar
CGO
2006
IEEE
13 years 12 months ago
Constructing Virtual Architectures on a Tiled Processor
As the amount of available silicon resources on one chip increases, we have seen the advent of ever increasing parallel resources integrated on-chip. Many architectures use these ...
David Wentzlaff, Anant Agarwal
SIGMOD
2009
ACM
161views Database» more  SIGMOD 2009»
14 years 18 days ago
Dependency-aware reordering for parallelizing query optimization in multi-core CPUs
The state of the art commercial query optimizers employ cost-based optimization and exploit dynamic programming (DP) to find the optimal query execution plan (QEP) without evalua...
Wook-Shin Han, Jinsoo Lee
ISCA
2006
IEEE
137views Hardware» more  ISCA 2006»
13 years 11 months ago
Multiple Instruction Stream Processor
Microprocessor design is undergoing a major paradigm shift towards multi-core designs, in anticipation that future performance gains will come from exploiting threadlevel parallel...
Richard A. Hankins, Gautham N. Chinya, Jamison D. ...