57 search results - page 12 / 12 » XTW, A Parallel and Distributed Logic Simulator |
IPPS
2006
IEEE
13 years 11 months ago
2006
IEEE
The designs of high-performance processor architectures are moving toward the integration of a large number of multiple processing cores on a single chip. The IBM Cyclops-64 (C64)...
CF
2010
ACM
13 years 10 months ago
2010
ACM
Per-core local (scratchpad) memories allow direct inter-core communication, with latency and energy advantages over coherent cache-based communication, especially as CMP architect...