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» Zero overhead watermarking technique for FPGA designs
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GLVLSI
2003
IEEE
130views VLSI» more  GLVLSI 2003»
13 years 10 months ago
Zero overhead watermarking technique for FPGA designs
FPGAs, because of their re-programmability, are becoming very popular for creating and exchanging VLSI intellectual properties (IPs) in the reuse-based design paradigm. Existing w...
Adarsh K. Jain, Lin Yuan, Pushkin R. Pari, Gang Qu
DAC
2001
ACM
14 years 6 months ago
Publicly Detectable Techniques for the Protection of Virtual Components
Highlighted with the newly released intellectual property (IP) protection white paper by VSI Alliance, the protection of virtual components (VCs) has received a large amount of at...
Gang Qu
CIT
2004
Springer
13 years 10 months ago
FPGA Based Implementation of an Invisible-Robust Image Watermarking Encoder
Abstract. Both encryption and digital watermarking techniques need to be incorporated in a digital rights management framework to address different aspects of content management. W...
Saraju P. Mohanty, Renuka Kumara C., Sridhara Naya...
ICCAD
1998
IEEE
83views Hardware» more  ICCAD 1998»
13 years 9 months ago
Signature hiding techniques for FPGA intellectual property protection
John Lach, William H. Mangione-Smith, Miodrag Potk...
FPGA
2003
ACM
117views FPGA» more  FPGA 2003»
13 years 10 months ago
Reducing pin and area overhead in fault-tolerant FPGA-based designs
This paper proposes a new high-level technique for designing fault tolerant systems in SRAM-based FPGAs, without modifications in the FPGA architecture. Traditionally, TMR has bee...
Fernanda Lima, Luigi Carro, Ricardo Augusto da Luz...