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MICRO
2006
IEEE
82views Hardware» more  MICRO 2006»
14 years 2 days ago
Yield-Aware Cache Architectures
One of the major issues faced by the semiconductor industry today is that of reducing chip yields. As the process technologies have scaled to smaller feature sizes, chip yields ha...
Serkan Ozdemir, Debjit Sinha, Gokhan Memik, Jonath...
ICC
2007
IEEE
160views Communications» more  ICC 2007»
14 years 12 days ago
IEEE 802.11-Based Mobile IP Fast Handoff Latency Analysis
— Mobile IP is a solution for mobility support in the global Internet. However, it suffers from long handoff delay. Many solutions have been proposed to reduce the handoff delay ...
Jiang Xie, Ivan Howitt, Izzeldin Shibeika
HPCA
2006
IEEE
14 years 6 months ago
Software-hardware cooperative memory disambiguation
In high-end processors, increasing the number of in-flight instructions can improve performance by overlapping useful processing with long-latency accesses to the main memory. Buf...
Ruke Huang, Alok Garg, Michael C. Huang
JIPS
2006
126views more  JIPS 2006»
13 years 6 months ago
TASL: A Traffic-Adapted Sleep/Listening MAC Protocol for Wireless Sensor Network
In this paper, we proposed a MAC protocol, which can dynamically adjust Listening/Sleeping time rate of wireless sensor nodes according to data traffic load. In sensor networks, se...
Yuan Yang, Zhen Fu, Tae-Seok Lee, Myong-Soon Park
MICRO
2000
IEEE
176views Hardware» more  MICRO 2000»
13 years 5 months ago
An Advanced Optimizer for the IA-64 Architecture
level of abstraction, compared with the program representation for scalar optimizations. For example, loop unrolling and loop unrolland-jam transformations exploit the large regist...
Rakesh Krishnaiyer, Dattatraya Kulkarni, Daniel M....