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TC
2008
13 years 4 months ago
Photonic Networks-on-Chip for Future Generations of Chip Multiprocessors
The design and performance of next-generation chip multiprocessors (CMPs) will be bound by the limited amount of power that can be dissipated on a single die. We present photonic n...
Assaf Shacham, Keren Bergman, Luca P. Carloni
CODES
2008
IEEE
13 years 6 months ago
ODOR: a microresonator-based high-performance low-cost router for optical networks-on-Chip
The performance of system-on-chip is determined not only by the performance of its functional units, but also by how efficiently they cooperate with one another. It is the on-chip...
Huaxi Gu, Jiang Xu, Zheng Wang
IS
2011
12 years 11 months ago
Optimized query routing trees for wireless sensor networks
In order to process continuous queries over Wireless Sensor Networks (WSNs), sensors are typically organized in a Query Routing Tree (denoted as T) that provides each sensor with ...
Panayiotis Andreou, Demetrios Zeinalipour-Yazti, A...
NOCS
2007
IEEE
13 years 11 months ago
On the Design of a Photonic Network-on-Chip
Recent remarkable advances in nanoscale siliconphotonic integrated circuitry specifically compatible with CMOS fabrication have generated new opportunities for leveraging the uni...
Assaf Shacham, Keren Bergman, Luca P. Carloni
DAC
2008
ACM
14 years 5 months ago
Concurrent topology and routing optimization in automotive network integration
In this paper, a novel automatic approach for the concurrent topology and routing optimization that achieves a high quality network layout is proposed. This optimization is based ...
Bardo Lang, Christian Haubelt, Jürgen Teich, ...