A Globally Asynchronous - Locally Synchronous (GALS) technique for application in wireless communication systems is proposed and evaluated. The GALS wrappers are based on a reques...
Networks on Chip that can guarantee Quality of Service (QNoC) are based on special routers that can support multiple service levels. GALS SoCs call for asynchronous NoC implementa...
Rostislav (Reuven) Dobkin, Victoria Vishnyakov, Ey...
This paper proposes applying a logic synthesis approach to high level synthesis from SpecC specifications to timed asynchronous gate-level circuits. The state-based logic synthes...
We propose a novel technique for modeling and verifying timed circuits based on the notion of generalized relative timing. Generalized relative timing constraints can express not ...
Sanjit A. Seshia, Randal E. Bryant, Kenneth S. Ste...
Unprotected cryptographic hardware is vulnerable to a side-channel attack known as Differential Power Analysis (DPA). This attack exploits data-dependent power consumption of a co...
Konrad J. Kulikowski, Ming Su, Alexander B. Smirno...