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DAC
2002
ACM
14 years 6 months ago
Constraint-driven communication synthesis
Constraint-driven Communication Synthesis enables the automatic design of the communication architecture of a complex system from a library of pre-defined Intellectual Property (I...
Alessandro Pinto, Luca P. Carloni, Alberto L. Sang...
ISSS
2002
IEEE
176views Hardware» more  ISSS 2002»
13 years 10 months ago
Controller Estimation for FPGA Target Architectures during High-Level Synthesis
In existing synthesis systems, the influence of the area and delay of the controller is not or not sufficiently taken into account. But the controller can have a big influence,...
Oliver Bringmann, Wolfgang Rosenstiel, Carsten Men...
DAC
2002
ACM
14 years 6 months ago
High-Level specification and automatic generation of IP interface monitors
A central problem in functional verification is to check that a circuit block is producing correct outputs while enforcing that the environment is providing legal inputs. To attac...
Marcio T. Oliveira, Alan J. Hu
FCCM
2002
IEEE
174views VLSI» more  FCCM 2002»
13 years 10 months ago
PAM-Blox II: Design and Evaluation of C++ Module Generation for Computing with FPGAs
This paper explores the implications of integrating flexible module generation into a compiler for FPGAs. The objective is to improve the programmabilityof FPGAs, or in other wor...
Oskar Mencer
GLVLSI
2002
IEEE
109views VLSI» more  GLVLSI 2002»
13 years 10 months ago
Minimizing resources in a repeating schedule for a split-node data-flow graph
Many computation-intensive or recursive applications commonly found in digital signal processing and image processing applications can be represented by data-flow graphs (DFGs). ...
Timothy W. O'Neil, Edwin Hsing-Mean Sha