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CLEIEJ
2010
13 years 2 months ago
3D-Via Driven Partitioning for 3D VLSI Integrated Circuits
A 3D circuit is the stacking of regular 2D circuits. The advances on the fabrication and packaging technologies allowed interconnecting stacked 2D circuits by using 3D vias. Howeve...
Sandro Sawicki, Gustavo Wilke, Marcelo O. Johann, ...
CLEIEJ
2010
13 years 2 months ago
Practices and Techniques for Engineering Process Capability Models
Software Process Improvement, based on a Maturity Level or a Process Capability Profile, from a Capability Maturity Model or an ISO/IEC 15504-based model, is well established in t...
Clenio F. Salviano, Marcia R. M. Martinez, Alessan...