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    CSREAESA
    2003
    115views Embedded Systems» more  CSREAESA 2003»
    Verification Patterns for Rapid Embedded System Verification
    13 years 6 months ago
    Verification Patterns for Rapid Embedded System Verification
    Download  asusrl.eas.asu.edu
    Wei-Tek Tsai, Feng Zhu, Lian Yu, Raymond A. Paul, ...
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    CSREAESA
    2003
    121views Embedded Systems» more  CSREAESA 2003»
    Design of Digital Circuits on the Basis of Hardware Templates
    13 years 6 months ago
    Design of Digital Circuits on the Basis of Hardware Templates
    Download  www.ieeta.pt
    The paper presents a technique for the design of digital circuits based on reusable hardware templates (HT). Any HT is being constructed in such a way that it might be employed for...
    Valery Sklyarov, Iouliia Skliarova
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    CSREAESA
    2003
    117views Embedded Systems» more  CSREAESA 2003»
    Low-Power Dynamic Scheduling in Heterogeneous Systems
    13 years 6 months ago
    Low-Power Dynamic Scheduling in Heterogeneous Systems
    Download  www.engr.newpaltz.edu
    : This paper develops a matching and scheduling algorithm that accounts for both the execution time and the power consumption of the application. The power consumption of different...
    Saumya Uppaluri, Baback A. Izadi, Damu Radhakrishn...
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    CSREAESA
    2003
    86views Embedded Systems» more  CSREAESA 2003»
    Power Optimized Combinational Logic Design
    13 years 6 months ago
    Power Optimized Combinational Logic Design
    Download  www.engr.newpaltz.edu
    In this paper we address the problem of minimization of power consumption in combinational circuits by minimizing the number of switching transitions at the output nodes of each g...
    R. V. Menon, S. Chennupati, Naveen K. Samala, Damu...
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    CSREAESA
    2003
    160views Embedded Systems» more  CSREAESA 2003»
    Worst Case Execution Time Analysis for Petri Net Models of Embedded Systems
    13 years 6 months ago
    Worst Case Execution Time Analysis for Petri Net Models of Embedded Systems
    Download  www.c-lab.de
    We present an approach for Worst-Case Execution Time (WCET) Analysis of embedded system software, that is generated from Petri net specifications. The presented approach is part ...
    Friedhelm Stappert, Carsten Rust
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