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DAC
1994
ACM
13 years 9 months ago
1994
ACM
Abstract - We address the problem of automatically verifying large digital designs at the logic level, against high-level specifications. In this paper, we present a methodology wh...
DAC
1994
ACM
13 years 9 months ago
1994
ACM
A low overhead DFT technique, called clock-grouping, for delay testing of sequential synchronous circuits is presented. The proposed technique increases robust path delay fault co...
DAC
1994
ACM
13 years 9 months ago
1994
ACM
In this paper, we consider the problem of calculating the signal and transition probabilities of the internal nodes of the combinational logic part of a nite state machine (FSM). ...
DAC
1994
ACM
13 years 9 months ago
1994
ACM
-- In this paper, a tool to aid pipelined processor instruction set implementation is described. The purpose of the tool is to choose from among design alternatives a design that m...
DAC
1994
ACM
13 years 9 months ago
1994
ACM
Acyclic partitioning on combinational boolean networks has wide range of applications, from multiple FPGA chip partitioning to parallel circuit simulation. In this paper, we prese...