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DFT
2009
IEEE
210views VLSI» more  DFT 2009»
13 years 7 months ago
Optimizing Parametric BIST Using Bio-inspired Computing Algorithms
Optimizing the BIST configuration based on the characteristics of the design under test is a complicated and challenging work for test engineers. Since this problem has multiple o...
Nastaran Nemati, Amirhossein Simjour, Amirali Ghof...
ICASSP
2009
IEEE
13 years 2 months ago
A MIMO-OFDM channel estimation scheme utilizing complementary sequences
We present a pilot-assisted method for estimating the frequency selective channel in a MIMO-OFDM system. The pilot sequence is designed using the DFT of the Golay complementary se...
Tariq R. Qureshi, Michael D. Zoltowski, A. Robert ...
ICMCS
2009
IEEE
150views Multimedia» more  ICMCS 2009»
13 years 2 months ago
Directional filtering transform
This paper proposes the directional filtering transform (dFT, in order to distinguish from the common usage on DFT) to better exploit intra-frame correlation in H.264 intra-frame ...
Xiulian Peng, Feng Wu, Jizheng Xu
DFT
2009
IEEE
154views VLSI» more  DFT 2009»
13 years 11 months ago
Dual-Layer Cooperative Error Control for Reliable Nanoscale Networks-on-Chip
We propose a framework that allows dual-layer cooperative error control in a nanoscale network-on-chip (NoC), to simultaneously improve reliability, performance and energy efficie...
Qiaoyan Yu, Paul Ampadu
DFT
2009
IEEE
189views VLSI» more  DFT 2009»
13 years 11 months ago
Analyzing Formal Verification and Testing Efforts of Different Fault Tolerance Mechanisms
Pre-fabrication design verification and post-fabrication chip testing are two important stages in the product realization process. These two stages consume a large part of resourc...
Meng Zhang, Anita Lungu, Daniel J. Sorin