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DSD
2005
IEEE
98views Hardware» more  DSD 2005»
13 years 10 months ago
On LUT Cascade Realizations of FIR Filters
This paper first defines the n-input q-output WS function, as a mathematical model of the combinational part of the distributed arithmetic of a finite impulse response (FIR) ...
Tsutomu Sasao, Yukihiro Iguchi, Takahiro Suzuki
DSD
2005
IEEE
70views Hardware» more  DSD 2005»
13 years 10 months ago
Vital Signs Remote Management System for PDAs
It is a challenge to provide an efficient healthcare service for countries with continental dimensions. Mechanisms for a more efficient and better attendance of patients are nec...
Danielly Cruz, Edna Barros
DSD
2005
IEEE
96views Hardware» more  DSD 2005»
13 years 6 months ago
Improvement of the Fault Coverage of the Pseudo-Random Phase in Column-Matching BIST
Several methods improving the fault coverage in mixed-mode BIST are presented in this paper. The test is divided into two phases: the pseudo-random and deterministic. Maximum of f...
Peter Filter, Hana Kubatova
DSD
2005
IEEE
116views Hardware» more  DSD 2005»
13 years 10 months ago
Validation of Embedded Systems Using Formal Method Aided Simulation
This paper proposes a validation approach, based on simulation, which addresses problems related to both state space explosion of formal methods and low coverage of informal metho...
Daniel Karlsson, Petru Eles, Zebo Peng
DSD
2005
IEEE
105views Hardware» more  DSD 2005»
13 years 10 months ago
Improved Fault Emulation for Synchronous Sequential Circuits
Current paper presents new alternatives for accelerating the task of fault simulation for sequential circuits by hardware emulation on FPGA. Fault simulation is an important subta...
Jaan Raik, Peeter Ellervee, Valentin Tihhomirov, R...