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FCCM
2004
IEEE
121views VLSI» more  FCCM 2004»
13 years 9 months ago
Validation of an Advanced Encryption Standard (AES) IP Core
This paper describes the package of test bench code required to verify the Algotronix' AES IP Core. Several authors (see the references in [3]) have published papers detailing...
Valeri F. Tomashau, Tom Kean
FCCM
2004
IEEE
98views VLSI» more  FCCM 2004»
13 years 9 months ago
Automated Least-Significant Bit Datapath Optimization for FPGAs
In this paper we present a method for FPGA datapath precision optimization subject to user-defined area and error constraints. This work builds upon our previous research [1] which...
Mark L. Chang, Scott Hauck
FCCM
2004
IEEE
144views VLSI» more  FCCM 2004»
13 years 9 months ago
Efficient Execution of Process Networks on a Reconfigurable Hardware Virtual Machine
In this paper we present a novel use of an FPGA as a computing element for streaming based application. We investigate the virtualized execution of dynamic reconfigurable tasks. We...
Matthias Dyer, Marco Platzner, Lothar Thiele
FCCM
2004
IEEE
91views VLSI» more  FCCM 2004»
13 years 9 months ago
An FPGA Interpolation Processor for Soft-Decision Reed-Solomon Decoding
We propose a parallel architecture for implementing the interpolation step in the Koetter-Vardy soft-decision ReedSolomon decoding algorithm. The key feature is the embedding of b...
Warren J. Gross, Frank R. Kschischang, P. Glenn Gu...
FCCM
2004
IEEE
269views VLSI» more  FCCM 2004»
13 years 9 months ago
FPGA Based Network Intrusion Detection using Content Addressable Memories
In this paper, we introduce a novel architecture for a hardware based network intrusion detection system (NIDS). Current software-based NIDS are too compute intensive and can not ...
Long Bu, John A. Chandy