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FCCM
2005
IEEE
131views VLSI» more  FCCM 2005»
13 years 11 months ago
Automating the Layout of Reconfigurable Subsystems Using Circuit Generators
When designing systems-on-a-chip (SoCs), a unique opportunity exists to generate custom FPGA architectures that are specific to the application domain in which the device will be ...
Shawn Phillips, Scott Hauck
FCCM
2005
IEEE
107views VLSI» more  FCCM 2005»
13 years 11 months ago
Simplifying the Integration of Processing Elements in Computing Systems Using a Programmable Controller
As technology sizes decrease and die area increases, designers are creating increasingly complex computing systems using FPGAs. To reduce design time for new products, the reuse o...
Lesley Shannon, Paul Chow
FCCM
2005
IEEE
115views VLSI» more  FCCM 2005»
13 years 11 months ago
FIFO Communication Models in Operating Systems for Reconfigurable Computing
Increasing demands upon embedded systems for higher level services like networking, user interfaces and file system management, are driving growth in fully-featured operating syst...
John A. Williams, Neil W. Bergmann, X. Xie
FCCM
2005
IEEE
102views VLSI» more  FCCM 2005»
13 years 11 months ago
A Signature Match Processor Architecture for Network Intrusion Detection
In this paper, we introduce a novel architecture for a hardware based network intrusion detection system (NIDS). NIDSs are becoming critical components of the network infrastructu...
Janardhan Singaraju, Long Bu, John A. Chandy
FCCM
2005
IEEE
139views VLSI» more  FCCM 2005»
13 years 11 months ago
A Study of the Scalability of On-Chip Routing for Just-in-Time FPGA Compilation
Just-in-time (JIT) compilation has been used in many applications to enable standard software binaries to execute on different underlying processor architectures. We previously in...
Roman L. Lysecky, Frank Vahid, Sheldon X.-D. Tan