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ICCAD
2008
IEEE
117views Hardware» more  ICCAD 2008»
13 years 11 months ago
A novel sequential circuit optimization with clock gating logic
— To save power consumption, it has been shown that the clock signal can be gated without changing the functionality under certain clock-gating conditions. We observe that the cl...
Yu-Min Kuo, Shih-Hung Weng, Shih-Chieh Chang
FLOPS
2008
Springer
13 years 6 months ago
Declarative Diagnosis of Missing Answers in Constraint Functional-Logic Programming
Abstract. We present a declarative method for diagnosing missing computed answers in CFLP(D), a generic scheme for lazy Constraint Functional-Logic Programming which can be instant...
Rafael Caballero, Mario Rodríguez-Artalejo,...
ISVLSI
2008
IEEE
125views VLSI» more  ISVLSI 2008»
13 years 11 months ago
Energy Recovery from High-Frequency Clocks Using DC-DC Converters
Large digital chips use a significant amount of energy to distribute a multi-GHz clock. By discharging the clock network to ground every cycle, the energy stored in this large cap...
Mehdi Alimadadi, Samad Sheikhaei, Guy Lemieux, Sha...
SIAMSC
2010
120views more  SIAMSC 2010»
13 years 3 months ago
Weighted Matrix Ordering and Parallel Banded Preconditioners for Iterative Linear System Solvers
The emergence of multicore architectures and highly scalable platforms motivates the development of novel algorithms and techniques that emphasize concurrency and are tolerant of ...
Murat Manguoglu, Mehmet Koyutürk, Ahmed H. Sa...