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FPGA
1995
ACM
105views FPGA» more  FPGA 1995»
13 years 9 months ago
On Nominal Delay Minimization in LUT-based FPGA Technology Mapping
We study the nominal delay minimization problem in LUTbased FPGA technologymapping, where interconnect delay is assumed proportionalto net fanout size. We prove that the delay-opt...
Jason Cong, Yuzheng Ding
FPGA
1995
ACM
136views FPGA» more  FPGA 1995»
13 years 9 months ago
A Field-Programmable Mixed-Analog-Digital Array
A novel field-programmable mixed-analog-digital array (FPMA) is proposed, which contains a field-programmable analog array, a field-programmable digital array, and a mixed-sign...
Paul Chow, P. Glenn Gulak
FPGA
1995
ACM
110views FPGA» more  FPGA 1995»
13 years 9 months ago
Design of FPGAs with Area I/O for Field Programmable MCM
Area-IO provide a way to eliminate the IO bottleneck of eld programmable logic devices (FPLDs) created the mismatch between the ability of perimeter bonds to provide IO and and t...
Vijayshri Maheshwari, Joel Darnauer, John Ramirez,...
FPGA
1995
ACM
110views FPGA» more  FPGA 1995»
13 years 9 months ago
Testing of Uncustomized Segmented Channel Field Programmable Gate Arrays
This paper presents a methodology for production-time testing of (uncustomized) segmented channel eld programmable gate arrays (FPGAs) such as those manufactured by Actel [1]. Th...
Tong Liu, Wei-Kang Huang, Fabrizio Lombardi
FPGA
1995
ACM
120views FPGA» more  FPGA 1995»
13 years 9 months ago
Synthesis of Signal Processing Structured Datapaths for FPGAs Supporting RAMs and Busses
A novel approach is presented for transforming a given scheduled and bound signal processing algorithm for a multiplexer based datapath to a BUS/RAM based FPGA datapath. A datapat...
Baher Haroun, Behzad Sajjadi