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HPCA
2002
IEEE
14 years 6 months ago
Improving Value Communication for Thread-Level Speculation
Thread-Level Speculation (TLS) allows us to automatically parallelize general-purpose programs by supporting parallel execution of threads that might not actually be independent. ...
J. Gregory Steffan, Christopher B. Colohan, Antoni...
HPCA
2002
IEEE
14 years 6 months ago
The Minimax Cache: An Energy-Efficient Framework for Media Processors
This work is based on our philosophy of providing interlayer system-level power awareness in computing systems [26, 27]. Here, we couple this approach with our vision of multipart...
Osman S. Unsal, Israel Koren, C. Mani Krishna, Csa...
HPCA
2002
IEEE
13 years 10 months ago
User-Level Communication in Cluster-Based Servers
Clusters of commodity computers are currently being used to provide the scalability required by severalpopular Internet services. In this paper we evaluate an efficient cluster-b...
Enrique V. Carrera, Srinath Rao, Liviu Iftode, Ric...
HPCA
2002
IEEE
13 years 10 months ago
Non-Vital Loads
As the frequency gap between main memory and modern microprocessor grows, the implementation and efficiency of on-chip caches become more important. The growing latency to memory ...
Ryan Rakvic, Bryan Black, Deepak Limaye, John Paul...
HPCA
2005
IEEE
14 years 6 months ago
Effective Instruction Prefetching in Chip Multiprocessors for Modern Commercial Applications
In this paper, we study the instruction cache miss behavior of four modern commercial applications (a database workload, TPC-W, SPECjAppServer2002 and SPECweb99). These applicatio...
Lawrence Spracklen, Yuan Chou, Santosh G. Abraham