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ICCAD
2001
IEEE
14 years 2 months ago
2001
IEEE
ICCAD
2001
IEEE
14 years 2 months ago
2001
IEEE
ICCAD
2001
IEEE
14 years 2 months ago
2001
IEEE
1 We propose an integrated technique for extensive optimization of the final test solution for System-on-Chip using Simulated Annealing. The produced results from the technique ar...
ICCAD
2001
IEEE
14 years 2 months ago
2001
IEEE
We present a methodology for generating black-box timing models for full-custom transistor-level CMOS circuits. Our approach utilizes transistor-level ternary symbolic timing simu...
ICCAD
2001
IEEE
14 years 2 months ago
2001
IEEE
- Real-time scheduling on processors that support dynamic voltage and frequency scaling is analyzed. The Slacked Earliest Deadling First (SEDF) algorithm is proposed and it is show...