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ICCAD
2009
IEEE
129views Hardware» more  ICCAD 2009»
9 years 1 months ago
A study of Through-Silicon-Via impact on the 3D stacked IC layout
Dae Hyun Kim, Krit Athikulwongse, Sung Kyu Lim
ICCAD
2009
IEEE
88views Hardware» more  ICCAD 2009»
9 years 1 months ago
IPR: In-Place Reconfiguration for FPGA fault tolerance
Zhe Feng 0002, Yu Hu, Lei He, Rupak Majumdar
ICCAD
2009
IEEE
85views Hardware» more  ICCAD 2009»
9 years 1 months ago
Synthesizing complementary circuits automatically
ShengYu Shen, Jianmin Zhang, Ying Qin, Sikun Li
ICCAD
2009
IEEE
126views Hardware» more  ICCAD 2009»
9 years 1 months ago
Timing Arc based logic analysis for false noise reduction
The problem of calculating accurate impact of crosstalk on a circuit considering its inherent logic and timing properties is very complex. Although it has been widely studied, it ...
Murthy Palla, Jens Bargfrede, Stephan Eggersgl&uum...
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