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ICCAD
2010
IEEE
216views Hardware» more  ICCAD 2010»
13 years 3 months ago
Stress-driven 3D-IC placement with TSV keep-out zone and regularity study
Through-silicon via (TSV) fabrication causes tensile stress around TSVs which results in significant carrier mobility variation in the devices in their neighborhood. Keep-out zone ...
Krit Athikulwongse, Ashutosh Chakraborty, Jae-Seok...
ICCAD
2010
IEEE
133views Hardware» more  ICCAD 2010»
13 years 2 months ago
Testing methods for detecting stuck-open power switches in coarse-grain MTCMOS designs
Coarse-grain multi-threshold CMOS (MTCMOS) is an effective power-gating technique to reduce IC's leakage power consumption by turning off idle devices with MTCMOS power switc...
Szu-Pang Mu, Yi-Ming Wang, Hao-Yu Yang, Mango Chia...
ICCAD
2010
IEEE
108views Hardware» more  ICCAD 2010»
13 years 2 months ago
Mathematical yield estimation for two-dimensional-redundancy memory arrays
Defect repair has become a necessary process to enhance the overall yield for memories since manufacturing a natural good memory is difficult in current memory technologies. This ...
Mango Chia-Tso Chao, Ching-Yu Chin, Chen-Wei Lin
ICCAD
2010
IEEE
186views Hardware» more  ICCAD 2010»
13 years 3 months ago
Application-Aware diagnosis of runtime hardware faults
Extreme technology scaling in silicon devices drastically affects reliability, particularly because of runtime failures induced by transistor wearout. Currently available online t...
Andrea Pellegrini, Valeria Bertacco
ICCAD
2010
IEEE
148views Hardware» more  ICCAD 2010»
13 years 3 months ago
Trace signal selection to enhance timing and logic visibility in post-silicon validation
Trace buffer technology allows tracking the values of a few number of state elements inside a chip within a desired time window, which is used to analyze logic errors during post-s...
Hamid Shojaei, Azadeh Davoodi