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ICCD
2007
IEEE
149views Hardware» more  ICCD 2007»
13 years 8 months ago
A radix-10 SRT divider based on alternative BCD codings
In this paper we present the algorithm and architecture of a radix-10 floating-point divider based on an SRT nonrestoring digit-by-digit algorithm. The algorithm uses conventional...
Álvaro Vázquez, Elisardo Antelo, Pao...
ICCD
2007
IEEE
139views Hardware» more  ICCD 2007»
14 years 1 months ago
Whitespace redistribution for thermal via insertion in 3D stacked ICs
One of the biggest challenges in 3D stacked IC design is heat dissipation. Incorporating thermal vias is a promising method for reducing the temperatures of 3D ICs. The bonding st...
Eric Wong, Sung Kyu Lim
ICCD
2007
IEEE
157views Hardware» more  ICCD 2007»
14 years 1 months ago
Limits on voltage scaling for caches utilizing fault tolerant techniques
This paper proposes a new low power cache architecture that utilizes fault tolerance to allow aggressively reduced voltage levels. The fault tolerant overhead circuits consume lit...
Mohammad A. Makhzan, Amin Khajeh Djahromi, Ahmed M...
ICCD
2007
IEEE
105views Hardware» more  ICCD 2007»
13 years 11 months ago
Circuit-level mismatch modelling and yield optimization for CMOS analog circuits
A methodology for constructing circuit-level mismatch models and performing yield optimization is presented for CMOS analog circuits. The methodology combines statistical techniqu...
Mingjing Chen, Alex Orailoglu
ICCD
2007
IEEE
190views Hardware» more  ICCD 2007»
14 years 1 months ago
Hybrid resistor/FET-logic demultiplexer architecture design for hybrid CMOS/nanodevice circuits
Hybrid nanoelectronics are emerging as one viable option to sustain the Moore’s Law after the CMOS scaling limit is reached. One main design challenge in hybrid nanoelectronics ...
Shu Li, Tong Zhang