Sciweavers

40 search results - page 7 / 8
» ipc 2007
Sort
View
ISCA
2007
IEEE
114views Hardware» more  ISCA 2007»
13 years 11 months ago
Matrix scheduler reloaded
From multiprocessor scale-up to cache sizes to the number of reorder-buffer entries, microarchitects wish to reap the benefits of more computing resources while staying within po...
Peter G. Sassone, Jeff Rupley, Edward Brekelbaum, ...
MICRO
2007
IEEE
120views Hardware» more  MICRO 2007»
13 years 11 months ago
Scavenger: A New Last Level Cache Architecture with Global Block Priority
Addresses suffering from cache misses typically exhibit repetitive patterns due to the temporal locality inherent in the access stream. However, we observe that the number of inte...
Arkaprava Basu, Nevin Kirman, Meyrem Kirman, Maina...
ICCD
2007
IEEE
109views Hardware» more  ICCD 2007»
13 years 9 months ago
Improving cache efficiency via resizing + remapping
In this paper we propose techniques to dynamically downsize or upsize a cache accompanied by cache set/line shutdown to produce efficient caches. Unlike previous approaches, resiz...
Subramanian Ramaswamy, Sudhakar Yalamanchili
AIPS
2007
13 years 7 months ago
Planning with Respect to an Existing Schedule of Events
Decomposition has proved an effective strategy in planning, with one decomposition-based planner, SGPLAN, exhibiting strong performance in the last two IPCs. By decomposing planni...
Andrew Coles, Maria Fox, Derek Long, Amanda Smith
PDPTA
2000
13 years 6 months ago
The PODOS File System - Exploiting the High-Speed Communication Subsystem
Performance Oriented Distributed Operating System (PODOS) is a clustering environment, being built on a monolithic Linux kernel. PODOS augments very few components to the Linux ke...
Sudharshan Vazhkudai, P. Tobin Maginnis