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ISCA
1997
IEEE
90views Hardware» more  ISCA 1997»
13 years 9 months ago
The Interaction of Software Prefetching with ILP Processors in Shared-Memory Systems
Current microprocessors aggressively exploit instructionlevel parallelism (ILP) through techniques such as multiple issue, dynamic scheduling, and non-blocking reads. Recent work ...
Parthasarathy Ranganathan, Vijay S. Pai, Hazim Abd...
VTS
1997
IEEE
86views Hardware» more  VTS 1997»
13 years 9 months ago
Incremental logic rectification
We address the problem of rectifying an incorrect combinational circuit against a given specification. Based on the symbolic BDD techniques, we consider the rectification process,...
Shi-Yu Huang, Kuang-Chien Chen, Kwang-Ting Cheng
DAC
1997
ACM
13 years 9 months ago
ATPG for Heat Dissipation Minimization During Scan Testing
An ATPG technique is proposed that reduces heat dissipation during testing of sequential circuits that have full-scan. The objective is to permit safe and inexpensive testing of l...
Seongmoon Wang, Sandeep K. Gupta
ICCAD
1997
IEEE
69views Hardware» more  ICCAD 1997»
13 years 9 months ago
Speeding up technology-independent timing optimization by network partitioning
Technology-independenttimingoptimizationis animportantproblem in logic synthesis. Although many promising techniques have been proposed in the past, unfortunately they are quite s...
Rajat Aggarwal, Rajeev Murgai, Masahiro Fujita
ICCAD
1997
IEEE
122views Hardware» more  ICCAD 1997»
13 years 9 months ago
Approximate timing analysis of combinational circuits under the XBD0 model
This paper is concerned with approximate delay computation algorithms for combinational circuits. As a result of intensive research in the early 90’s [3, 8] efficient tools exi...
Yuji Kukimoto, Wilsin Gosti, Alexander Saldanha, R...