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ISMVL
2005
IEEE
13 years 11 months ago
2005
IEEE
In this paper, we propose three novel cache models using Multiple-Valued Logic (MVL) paradigm to reduce the cache data storage area and cache energy consumption for embedded syste...
ISMVL
2005
IEEE
13 years 11 months ago
2005
IEEE
As logic device sizes shrink towards the nanometer scale, a number of important physical limits threaten to soon halt further improvements in computer performance per unit cost. H...