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ISPASS
2006
IEEE
13 years 10 months ago
A statistical multiprocessor cache model
Erik Berg, Håkan Zeffer, Erik Hagersten
ISPASS
2006
IEEE
13 years 10 months ago
Compiler-based adaptive fetch throttling for energy-efficiency
Huaping Wang, Yao Guo, Israel Koren, C. Mani Krish...
ISPASS
2006
IEEE
13 years 10 months ago
Evaluating the efficacy of statistical simulation for design space exploration
Ajay Joshi, Joshua J. Yi, Robert H. Bell Jr., Liev...
ISPASS
2010
IEEE
13 years 11 months ago
Synthesizing memory-level parallelism aware miniature clones for SPEC CPU2006 and ImplantBench workloads
Abstract—We generate and provide miniature synthetic benchmark clones for modern workloads to solve two pre-silicon design challenges, namely: 1) huge simulation time (weeks to m...
Karthik Ganesan, Jungho Jo, Lizy K. John