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ISPD
1998
ACM
13 years 9 months ago
1998
ACM
—High-frequency circuits are notoriously difficult to lay out because of the tight coupling between device-level placement and wiring. Given that successful electrical performan...
ISPD
1998
ACM
13 years 9 months ago
1998
ACM
Wirelength estimation in VLSI layout is fundamental to any pre-detailed routing estimate of timing or routability. In this paper, we develop e cient wirelength estimation techniqu...
ISPD
1998
ACM
13 years 9 months ago
1998
ACM
This paper describes an important new facility for timing-driven design applications within the new CHDStd standard for a SEMATECH design system for large complex chips. We first ...
ISPD
1998
ACM
13 years 9 months ago
1998
ACM
—The greedy wire-sizing algorithm (GWSA) has been experimentally shown to be very efficient, but no mathematical analysis on its convergence rate has ever been reported. In this...
ISPD
1998
ACM
13 years 9 months ago
1998
ACM
In this paper, we formulate the problem of topology constrained rectilinear block packing in layout reuse. A speci c class of rectilinear shaped blocks, ordered convex rectilinear...