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ISPD
2004
ACM
92views Hardware» more  ISPD 2004»
13 years 10 months ago
A predictive distributed congestion metric and its application to technology mapping
Due to increasing design complexity, routing congestion has become a critical problem in VLSI designs. This paper introduces a distributed metric to predict routing congestion for...
Rupesh S. Shelar, Sachin S. Sapatnekar, Prashant S...
ISPD
2004
ACM
161views Hardware» more  ISPD 2004»
13 years 10 months ago
Early-stage power grid analysis for uncertain working modes
High performance integrated circuits are now reaching the 100-plus watt regime, and power delivery and power grid signal integrity have become critical. Analyzing the performance ...
Haifeng Qian, Sani R. Nassif, Sachin S. Sapatnekar
ISPD
2004
ACM
150views Hardware» more  ISPD 2004»
13 years 10 months ago
Topology optimization of structured power/ground networks
This paper presents an efficient method for optimizing the design of power/ground (P/G) networks by using locally regular, globally irregular grids. The procedure divides the pow...
Jaskirat Singh, Sachin S. Sapatnekar
ISPD
2004
ACM
171views Hardware» more  ISPD 2004»
13 years 10 months ago
Structured ASIC, evolution or revolution?
This paper describes the structured ASIC technology and impacts to the implementation flow. With an optimized and programmable structure, the structured ASIC technology indeed int...
Kun-Cheng Wu, Yu-Wen Tsai
ISPD
2004
ACM
126views Hardware» more  ISPD 2004»
13 years 10 months ago
Recursive bisection based mixed block placement
Many current designs contain a large number of standard cells intermixed with larger macro blocks. The range of size in these “mixed block” designs complicates the placement p...
Ateen Khatkhate, Chen Li 0004, Ameya R. Agnihotri,...