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ISQED
2008
IEEE
101views Hardware» more  ISQED 2008»
13 years 11 months ago
Projection-Based Piecewise-Linear Response Surface Modeling for Strongly Nonlinear VLSI Performance Variations
Large-scale process fluctuations (particularly random device mismatches) at nanoscale technologies bring about highdimensional strongly nonlinear performance variations that canno...
Xin Li, Yu Cao
ISQED
2008
IEEE
66views Hardware» more  ISQED 2008»
13 years 11 months ago
An Implementation of Performance-Driven Block and I/O Placement for Chip-Package Codesign
– As silicon technology scales, we can integrate more and more circuits on a single chip, which means more I/Os are needed in modern designs. The flip-chip technology which was ...
Ming-Fang Lai, Hung-Ming Chen
ISQED
2008
IEEE
151views Hardware» more  ISQED 2008»
13 years 11 months ago
Quality of a Bit (QoB): A New Concept in Dependable SRAM
We propose a novel dependable SRAM with 7T memory cells, and introduce a new concept, “quality of a bit (QoB)” for it. The proposed SRAM has three modes: a typical mode, high-...
Hidehiro Fujiwara, Shunsuke Okumura, Yusuke Iguchi...
ISQED
2008
IEEE
112views Hardware» more  ISQED 2008»
13 years 11 months ago
Robust Analog Design for Automotive Applications by Design Centering with Safe Operating Areas
The effects of random variations during the manufacturing process on devices can be simulated as a variation of transistor parameters. Device degradation, due to temperature or vo...
Udo Sobe, Karl-Heinz Rooch, Andreas Ripp, Michael ...
ISQED
2008
IEEE
153views Hardware» more  ISQED 2008»
13 years 11 months ago
Accelerating Clock Mesh Simulation Using Matrix-Level Macromodels and Dynamic Time Step Rounding
Clock meshes have found increasingly wide applications in today’s high-performance IC designs. The inherent routing redundancies associated with clock meshes lead to improved cl...
Xiaoji Ye, Min Zhao, Rajendran Panda, Peng Li, Jia...