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ISSS
1995
IEEE
121views Hardware» more  ISSS 1995»
13 years 8 months ago
A comprehensive estimation technique for high-level synthesis
We present an integrated approach aimed at predicting layout area needed to implement a behavioral description for a given performance goal. Our approach is novel because: (1) it ...
Seong Yong Ohm, Fadi J. Kurdahi, Nikil Dutt, Min X...
ISSS
1995
IEEE
116views Hardware» more  ISSS 1995»
13 years 8 months ago
The Chinook hardware/software co-synthesis system
Designers of embedded systems are facing ever tighter constraintson design time, but computer aided design tools for embedded systems have not kept pace with these trends. The Chi...
Pai H. Chou, Ross B. Ortega, Gaetano Borriello
ISSS
1995
IEEE
100views Hardware» more  ISSS 1995»
13 years 8 months ago
Power analysis and low-power scheduling techniques for embedded DSP software
This paper describes the application of a measurement based power analysis technique for an embedded DSP processor. An instruction-level power model for the processor has been dev...
Mike Tien-Chien Lee, Vivek Tiwari, Sharad Malik, M...
ISSS
1995
IEEE
87views Hardware» more  ISSS 1995»
13 years 8 months ago
Industrial experience using rule-driven retargetable code generation for multimedia applications
The increasing usage of Application Specific Instruction Set Processors (ASIPs) in audio and video telecommunications has made strong demands on the rapid availability of dedicat...
Clifford Liem, Pierre G. Paulin, Marco Cornero, Ah...
ISSS
1995
IEEE
161views Hardware» more  ISSS 1995»
13 years 8 months ago
Synthesis of pipelined DSP accelerators with dynamic scheduling
To construct complete systems on silicon, application speci c DSP accelerators are needed to speed up the execution of high throughput DSP algorithms. In this paper, a methodology...
Patrick Schaumont, Bart Vanthournout, Ivo Bolsens,...