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ISVLSI
2006
IEEE
105views VLSI» more  ISVLSI 2006»
13 years 10 months ago
Floorplanning Based on Particle Swarm Optimization
Tsung-Ying Sun, Sheng-Ta Hsieh, Hsiang-Min Wang, C...
ISVLSI
2006
IEEE
88views VLSI» more  ISVLSI 2006»
13 years 10 months ago
Effects of Parameter Variations and Crosstalk Noise on H-Tree Clock Distribution Networks
— The effects of parameter variations and crosstalk noise on the clock signal propagating along an H-tree clock distribution network are investigated in this paper. In particular...
Itisha Chanodia, Dimitrios Velenis
ISVLSI
2006
IEEE
82views VLSI» more  ISVLSI 2006»
13 years 10 months ago
Optimal Periodical Memory Allocation for Logic-in-Memory Image Processors
One major issue in designing image processors is to design a memory system that supports parallel access with a simple interconnection network. This paper presents a design method...
Masanori Hariyama, Michitaka Kameyama, Yasuhiro Ko...
ISVLSI
2006
IEEE
77views VLSI» more  ISVLSI 2006»
13 years 10 months ago
A Robust Synchronizer
We describe a new latch circuit designed to give a high performance in low voltage synchronizer applications. By increasing the latch current only during metastability, we can mor...
Jun Zhou, David Kinniment, Gordon Russell, Alexand...
ISVLSI
2006
IEEE
82views VLSI» more  ISVLSI 2006»
13 years 10 months ago
Reliability-Aware SOC Voltage Islands Partition and Floorplan
— Based on the proposed reliability characterization model, reliability-bounded low-power design as a methodology to balance reliability enhancement and power reduction in chip d...
Shengqi Yang, Wayne Wolf, Narayanan Vijaykrishnan,...