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MICRO
1995
IEEE
72views Hardware» more  MICRO 1995»
13 years 9 months ago
Dynamic rescheduling: a technique for object code compatibility in VLIW architectures
Lack of object code compatibility in VLIW architectures is a severe limit to their adoption as a generalpurpose computing paradigm. Previous approaches include hardware and softwa...
Thomas M. Conte, Sumedh W. Sathaye
MICRO
1995
IEEE
217views Hardware» more  MICRO 1995»
13 years 9 months ago
Improving instruction-level parallelism by loop unrolling and dynamic memory disambiguation
Exploitation ofinstruction-levelparallelism is an ejfective mechanism for improving the performance of modern super-scalar/VLIW processors. Various software techniques can be appl...
Jack W. Davidson, Sanjay Jinturkar
ACSAC
2009
IEEE
14 years 5 days ago
Java Security: A Ten Year Retrospective
— The first edition of Java (both the language and the platform) was released in 1995, which contained the all-ornothing security access model. A mid-1997 paper I published in IE...
Li Gong
MICRO
1995
IEEE
108views Hardware» more  MICRO 1995»
13 years 9 months ago
SPAID: software prefetching in pointer- and call-intensive environments
Software prefetching, typically in the context of numericor loop-intensive benchmarks, has been proposed as one remedy for the performance bottleneck imposed on computer systems b...
Mikko H. Lipasti, William J. Schmidt, Steven R. Ku...
MICRO
1995
IEEE
140views Hardware» more  MICRO 1995»
13 years 9 months ago
A system level perspective on branch architecture performance
Accurate instruction fetch and branch prediction is increasingly important on today’s wide-issue architectures. Fetch prediction is the process of determining the next instructi...
Brad Calder, Dirk Grunwald, Joel S. Emer