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ARITH
1999
IEEE
13 years 9 months ago
Reduced Latency IEEE Floating-Point Standard Adder Architectures
The design and implementation of a double precision floating-point IEEE-754 standard adder is described which uses "flagged prefix addition" to merge rounding with the s...
Andrew Beaumont-Smith, Neil Burgess, S. Lefrere, C...
ARITH
1999
IEEE
13 years 9 months ago
High-Speed Inverse Square Roots
Inverse square roots are used in several digital signal processing, multimedia, and scientific computing applications. This paper presents a high-speed method for computing invers...
Michael J. Schulte, Kent E. Wires
MICCAI
1999
Springer
13 years 9 months ago
Detection of Pulmonary Nodules on Ct and Volumetric Assessment of Change over Time
Abstract. We present a computer vision system that automatically detects pulmonary nodules in computed tomography (CT) scans of oncology patients, performs size analysis and assess...
Margrit Betke, Jane P. Ko