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nocs 2008
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SEU-Hardened Energy Recovery Pipelined Interconnects for On-Chip Networks
13 years 11 months ago
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Alireza Ejlali, Bashir M. Al-Hashimi
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Impact of Process and Temperature Variations on Network-on-Chip Design Exploration
13 years 11 months ago
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Bin Li, Li-Shiuan Peh, Priyadarsan Patra
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Physical Implementation of the DSPIN Network-on-Chip in the FAUST Architecture
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Ivan Miro Panades, Fabien Clermidy, Pascal Vivet, ...
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A Network of Time-Division Multiplexed Wiring for FPGAs
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Rosemary M. Francis, Simon W. Moore, Robert D. Mul...
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Applying Dataflow Analysis to Dimension Buffers for Guaranteed Performance in Networks on Chip
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Andreas Hansson, Maarten Wiggers, Arno Moonen, Kee...
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