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2010
IEEE
126views Hardware» more  DATE 2010»
13 years 11 months ago
Leveraging dominators for preprocessing QBF
— Many CAD for VLSI problems can be naturally encoded as Quantified Boolean Formulas (QBFs) and solved with QBF solvers. Furthermore, such problems often contain circuitbased in...
Hratch Mangassarian, Bao Le, Alexandra Goultiaeva,...
JDA
2010
131views more  JDA 2010»
13 years 4 months ago
Convex drawings of hierarchical planar graphs and clustered planar graphs
: Hierarchical graphs are graphs with layering structures; clustered graphs are graphs with recursive clustering structures. Both have applications in VLSI design, CASE tools, soft...
Seok-Hee Hong, Hiroshi Nagamochi
ICCAD
2010
IEEE
158views Hardware» more  ICCAD 2010»
13 years 3 months ago
Novel binary linear programming for high performance clock mesh synthesis
Clock mesh is popular in high performance VLSI design because it is more robust against variations than clock tree at a cost of higher power consumption. In this paper, we propose ...
Minsik Cho, David Z. Pan, Ruchir Puri
INFOCOM
2010
IEEE
13 years 3 months ago
Optimal Solutions for Single Fault Localization in Two Dimensional Lattice Networks
Abstract--Achieving fast, precise, and scalable fault localization has long been a highly desired feature in all-optical mesh networks. Monitoring tree (m-tree) is an interesting m...
János Tapolcai, Lajos Rónyai, Pin-Ha...
TVLSI
2010
13 years 14 days ago
Pattern Sensitive Placement Perturbation for Manufacturability
The gap between VLSI technology and fabrication technology leads to strong refractive effects in lithography. Consequently, it is a huge challenge to reliably print layout features...
Shiyan Hu, Patrik Shah, Jiang Hu