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VLSID
1994
IEEE
103views VLSI» more  VLSID 1994»
13 years 9 months ago
GLOVE: A Graph-Based Layout Verifier
Cyrus Bamji, Jonathan Allen
VLSID
1994
IEEE
108views VLSI» more  VLSID 1994»
13 years 8 months ago
A New Genetic Algorithm for the Channel Routing Problem
Jens Lienig, Krishnaiyan Thulasiraman
VLSID
1994
IEEE
82views VLSI» more  VLSID 1994»
13 years 9 months ago
High Speed Digital Filtering on SRAM-Based FPGAs
A. Giri, V. Visvanathan, S. K. Nandy, S. K. Ghosha...
VLSID
1994
IEEE
151views VLSI» more  VLSID 1994»
13 years 9 months ago
A CORDIC Based Programmable DXT Processor Array
A CORDIC based processor array which can be programmed by switch settings to compute the Discrete Hariley, Cosine or Sine lhnsforms or their inverses is described. Through a novel...
V. K. Anuradha, V. Visvanathan
VLSID
1994
IEEE
124views VLSI» more  VLSID 1994»
13 years 9 months ago
ILP-Based Scheduling with Time and Resource Constraints in High Level Synthesis
In this paper, we present a formal analysis of the constraints of the scheduling problem, and evaluate the structure of the scheduling polytope described by those constraints. Pol...
Samit Chaudhuri, Robert A. Walker