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VLSID
2002
IEEE
142views VLSI» more  VLSID 2002»
14 years 5 months ago
Architecture and Design of a High Performance SRAM for SOC Design
Critical issues in designing a high speed, low power static RAM in deep submicron technologies are described along with the design techniques used to overcome them. With appropria...
Shobha Singh, Shamsi Azmi, Nutan Aarawal, Penaka P...
VLSID
2002
IEEE
81views VLSI» more  VLSID 2002»
13 years 10 months ago
A New Synthesis of Symmetric Functions
A new approach to synthesizing totally symmetric Boolean functions is presented. First, a novel cellular array is introduced for synthesizing unate symmetric functions. Using this...
Hafizur Rahaman, Debesh K. Das, Bhargab B. Bhattac...
VLSID
2002
IEEE
74views VLSI» more  VLSID 2002»
14 years 5 months ago
Interconnect Energy Dissipation in High-Speed ULSI Circuits
- This work presents accurate closed-form expressions for the interconnect energy dissipation in high-speed ULSI circuits. Unlike previous works, the energy is calculated using an ...
Payam Heydari, Massoud Pedram
VLSID
2002
IEEE
130views VLSI» more  VLSID 2002»
14 years 5 months ago
Using Randomized Rounding to Satisfy Timing Constraints of Real-Time Preemptive Tasks
In preemptive real-time systems, a tighter estimate of the Worst Case Response Time(WCRT) of the tasks can be obtained if the layout of the tasks in memory is included in the esti...
Anupam Datta, Sidharth Choudhury, Anupam Basu
VLSID
2002
IEEE
116views VLSI» more  VLSID 2002»
14 years 5 months ago
Register Transfer Operation Analysis during Data Path Verification
A control part ? data path partition based sequential circuit verification scheme aimed at avoiding state explosion comprises two major modules namely, a data path verifier and a ...
D. Sarkar