Sciweavers

30 search results - page 2 / 6
» vlsid 2003
Sort
View
VLSID
2003
IEEE
104views VLSI» more  VLSID 2003»
14 years 5 months ago
Analyzing Soft Errors in Leakage Optimized SRAM Design
Reducing leakage power and improving the reliability of data stored in the memory cells are both becoming challenging as technology scales down. While the smaller threshold voltag...
Vijay Degalahal, Narayanan Vijaykrishnan, Mary Jan...
VLSID
2003
IEEE
104views VLSI» more  VLSID 2003»
13 years 10 months ago
Interfacing Cores with On-chip Packet-Switched Networks
With the emergence of the packet-switched networks as a possible system-on-chip (SoC) communication paradigm, the design of network-on-chips (NoC) has provided a challenge to the ...
Praveen Bhojwani, Rabi N. Mahapatra
VLSID
2003
IEEE
253views VLSI» more  VLSID 2003»
14 years 5 months ago
High Level Synthesis from Sim-nML Processor Models
The design of modern complex embedded systems require a high level of abstraction of the design. The SimnML[1] is a specification language to model processors for such designs. Se...
Souvik Basu, Rajat Moona
VLSID
2003
IEEE
126views VLSI» more  VLSID 2003»
14 years 5 months ago
Comparison of Heuristic Algorithms for Variable Partitioning in Circuit Implementation
Functional decomposition is a process of splitting a complex circuit into smaller sub-circuits. This paper deals with the problem of determining the set of best free and bound var...
Muthukumar Venkatesan, Henry Selvaraj
VLSID
2003
IEEE
144views VLSI» more  VLSID 2003»
14 years 5 months ago
The Impact of Bit-Line Coupling and Ground Bounce on CMOS SRAM Performance
In this paper, we provide an analytical framework to study the inter-cell and intra-cell bit-line coupling when it is superimposed with the ground bounce effect and show how those...
Li Ding 0002, Pinaki Mazumder