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VTS
1995
IEEE
94views Hardware» more  VTS 1995»
13 years 8 months ago
Synthesis of locally exhaustive test pattern generators
Optimized locally exhaustive test pattern generators based on linear sums promise a low overhead, but have an irregular structure. The paper presents a new algorithm able to compu...
Günter Kemnitz
VTS
1995
IEEE
105views Hardware» more  VTS 1995»
13 years 8 months ago
Cyclic stress tests for full scan circuits
To ensure the production of reliable circuits and fully testable unpackaged dies for MCMs burn-in, both dynamic and monitored, remains a feasible option. During this burn-in proce...
Vinay Dabholkar, Sreejit Chakravarty, J. Najm, Jan...
VTS
1995
IEEE
100views Hardware» more  VTS 1995»
13 years 8 months ago
Transformed pseudo-random patterns for BIST
This paper presents a new approach for on-chip test pattern generation. The set of test patterns generated by a pseudo-random pattern generator (e.g., an LFSR) is transformed into...
Nur A. Touba, Edward J. McCluskey