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VTS
2000
IEEE
13 years 9 months ago
2000
IEEE
ESIM is a simulation tool that integrates logic fault and design error simulation for logic circuits. It targets several design error and fault models, and uses a novel mix of sim...
VTS
2000
IEEE
13 years 9 months ago
2000
IEEE
Testing of high performance integrated circuits is becoming increasingly a challenging task owing to high clock frequencies. Often testers are not able to test such devices due to...
VTS
2000
IEEE
13 years 9 months ago
2000
IEEE
Mixed-signal design and test tools are failing to keep apace with the increasing necessity for design exploration at the e arly stages.We outline a methodolo gy and toolset to ena...
VTS
2000
IEEE
13 years 9 months ago
2000
IEEE
Abstract: This paper presents a notation for describing functional fault models, which may occur in memory devices. Using this notation, the space of all possible memory faults has...
VTS
2000
IEEE
13 years 9 months ago
2000
IEEE
Redundancy techniques are commonly used to design dependable systems to ensure high reliability, availability and data integrity. Triple Modular Redundancy (TMR) is a widely used ...