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    VLSID
    1997
    IEEE
    106views VLSI» more  VLSID 1997»
    Low-Power Configurable Processor Array for DLMS Adaptive Filtering
    13 years 8 months ago
    Low-Power Configurable Processor Array for DLMS Adaptive Filtering
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    I n this paper, we first present a pipelined delayed least mean square (DLMS) adaptive filter architecture whose power dissipation meets a specified budget. This low-power archite...
    S. Ramanathan, V. Visvanathan
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