Sciweavers

Share
warning: Creating default object from empty value in /var/www/modules/taxonomy/taxonomy.module on line 1416.
AHS
2007
IEEE
215views Hardware» more  AHS 2007»
11 years 5 months ago
Online Evolution for a High-Speed Image Recognition System Implemented On a Virtex-II Pro FPGA
Online incremental evolution for a complex high-speed pattern recognition architecture has been implemented on a Xilinx Virtex-II Pro FPGA. The fitness evaluation module is entir...
Kyrre Glette, Jim Torresen, Moritoshi Yasunaga
AHS
2007
IEEE
245views Hardware» more  AHS 2007»
11 years 5 months ago
Characterising Wireless Sensor Motes for Space Applications
This paper is concerned with application of standard wireless COTS protocols to space. Suitability of commercially available wireless sensor mote kits for communication inside and...
Tanya Vladimirova, Christopher P. Bridges, George ...
AHS
2007
IEEE
222views Hardware» more  AHS 2007»
11 years 5 months ago
Programmable Analog VLSI Architecture Based upon Event Coding
Abstract— A programmable analog array inspired from neuronal spike event coding is presented. A configurable event block forms the basic building block of the programmable array...
Thomas Jacob Koickal, Alister Hamilton, Luiz C. P....
AHS
2007
IEEE
202views Hardware» more  AHS 2007»
11 years 5 months ago
PERPLEXUS: Pervasive Computing Framework for Modeling Complex Virtually-Unbounded Systems
This paper introduces Perplexus, a European project that aims to develop a scalable hardware platform made of custom reconfigurable devices endowed with bio-inspired capabilities...
Eduardo Sanchez, Andrés Pérez-Uribe,...
AHS
2007
IEEE
262views Hardware» more  AHS 2007»
11 years 7 months ago
A Reed-Solomon Algorithm for FPGA Area Optimization in Space Applications
This work describes an algebraic based design strategy targeting area optimization in reconfigurable computer technology (FPGA). Area optimization is a major issue as smaller comp...
Gabriel Marchesan Almeida, Eduardo Augusto Bezerra...
AHS
2007
IEEE
208views Hardware» more  AHS 2007»
11 years 7 months ago
Evolving Redundant Structures for Reliable Circuits - Lessons Learned
Fault Tolerance is an increasing challenge for integrated circuits due to semiconductor technology scaling. This paper looks at how artificial evolution may be tuned to the creat...
Asbjørn Djupdal, Pauline C. Haddow
AHS
2007
IEEE
211views Hardware» more  AHS 2007»
11 years 9 months ago
Synthesis of Multimode digital signal processing systems
In this paper, we propose a design methodology for implementing a multimode (or multi-configuration) and multi-throughput system into a single hardware architecture. The inputs of...
Caaliph Andriamisaina, Emmanuel Casseau, Philippe ...
AHS
2007
IEEE
239views Hardware» more  AHS 2007»
11 years 9 months ago
Separation of Data flow and Control flow in Reconfigurable Multi-core SoCs using the Gannet Service-based Architecture
This paper presents a mechanism for the separation of control and data flow in NoC-based SoCs consisting of multiple heterogeneous reconfigurable IP cores. This mechanism enables ...
Wim Vanderbauwhede
AHS
2007
IEEE
251views Hardware» more  AHS 2007»
11 years 9 months ago
System Level Modelling of Reconfigurable FFT Architecture for System-on-Chip Design
In the system-on-chip (SoC) era, the growing number of functionalities included on a single chip requires the development of new design methodologies to keep the design complexity...
Ali Ahmadinia, Balal Ahmad, Tughrul Arslan
AHS
2007
IEEE
231views Hardware» more  AHS 2007»
11 years 11 months ago
Debug Support for Hybrid SoCs
System-on-Chip devices containing both conventional and reconfigurable circuits are increasing in popularity. However the on-chip debug support infrastructure required to aid syst...
Andrew B. T. Hopkins, Klaus D. McDonald-Maier
books