Debug Support for Hybrid SoCs

10 years 7 months ago
Debug Support for Hybrid SoCs
System-on-Chip devices containing both conventional and reconfigurable circuits are increasing in popularity. However the on-chip debug support infrastructure required to aid systems development has not fully addressed the concept of such hybrid SoCs. This paper outlines the requirements for on-chip debug support with a focus on hard real-time systems. A generic approach to incorporate Field Programmable Gate Array based circuits into a system centric debug support methodology is introduced and a suitable interface defined. An assessment of the overhead introduced by adding debug support is made by synthesis of a configurable logic cell adapted to include debug support. The increase in overhead is found to be approximately 3.4 percent.
Andrew B. T. Hopkins, Klaus D. McDonald-Maier
Added 05 Jun 2010
Updated 05 Jun 2010
Type Conference
Year 2007
Where AHS
Authors Andrew B. T. Hopkins, Klaus D. McDonald-Maier
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