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ISCA
2011
IEEE
229views Hardware» more  ISCA 2011»
8 years 3 months ago
TLSync: support for multiple fast barriers using on-chip transmission lines
As the number of cores on a single-chip grows, scalable barrier synchronization becomes increasingly diļ¬ƒcult to implement. In software implementations, such as the tournament ba...
Jungju Oh, Milos Prvulovic, Alenka G. Zajic
ISPASS
2008
IEEE
9 years 5 months ago
Program Phase Detection based on Critical Basic Block Transitions
Many programs go through phases as they execute. Knowing where these phases begin and end can be beneficial. For example, adaptive architectures can exploit such information to lo...
Paruj Ratanaworabhan, Martin Burtscher
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